FPGA board from digilentic

Parallel Programming for FPGAs

One of the greatest features of FPGAs is the inherent desing that allows them to be parallel. With PEGGY I plan to make a large parallel systems there is just something about FPGAs that bring back fond memories. FPGAs allow you to create MASIVE parallelisum.

A few days ago Conell university put out a book for free that talks about creating parallel programing with FPGA

“This book focuses on the use of algorithmic high-level synthesis (HLS) to build application-specific FPGA systems. Our goal is to give the reader an appreciation of the process of creating an optimized hardware design using HLS.”

Side rant: FPGAs don’t run software, but many people mistake HDL/VHDL descriptions for software because they look similar, but it doesn’t compile to object code like a normal program.

As an example of what HLS looks like, here’s an FFT which, admittedly, uses some other C functions. But it is much more intuitive — especially if you are a programmer — than similar code would be in VHDL or Verilog.

#pragma HLS dataflow
DTYPE Stage1 R[SIZE], Stage1 I[SIZE];
DTYPE Stage2 R[SIZE], Stage2 I[SIZE];
DTYPE Stage3 R[SIZE], Stage3 I[SIZE];
bit reverse(X R, X I, Stage1 R, Stage1 I);
fft stage one(Stage1 R, Stage1 I, Stage2 R, Stage2 I);
fft stages two(Stage2 R, Stage2 I, Stage3 R, Stage3 R);
fft stage three(Stage3 R, Stage3 I, OUT R, OUT I);

You can pick up an FPGA from amazon for around $20 for a basic one (you will need a JTAG connector and a basic breadboard kit to get interfacing with the world around you) or a good starter for $150

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